This is an Engineering position for High Speed Interconnect Products (HSIP).
Broadcom has the most extensive physical layer product portfolio in the industry including 400-Gigabit Ethernet Copper and Optical PHYs, Backplane SerDes, 100GBASE-KR PHYs and Optical Transport. Broadcom’s proven PHY technology offers lower power with a smaller footprint, as well as proven interoperability and advanced features, making it easier and less expensive to build an array of networking equipment, including telecommunications chassis, switches, routers, hubs and more.
In this role you will join a team of highly skilled developers involved in design, modeling, verification, firmware and software development working on the physical layer of high speed SerDes. Our SerDes operate at speeds of 112Gbps serially and contain both analog and digital components.
The types of software implemented include: control and status, debug functions, calibration and adaptation. We develop embedded firmware, API and Host level software.
Responsibilities may include:
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Develop embedded firmware for ARM M0 microcontroller
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Simulate and debug of firmware in RTL Verilog simulation
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Develop pre-silicon modelling and testing methodology or testbench
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Develop and support API software for SerDes IP cores across company
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Optimize implementation at various levels including firmware, API and Application.
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Integrate and debug the SerDes IP and software on development systems and target hardware.
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Document design and implementation details.
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Provide customer support and field debugging as required.
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Develop, test and debug firmware associated with physical layer functionality
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Lab testing and debug of SerDes IP
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Typically requires a BS degree and 8 years of experience or an MS degree and 6 years of experience or a PhD and 3 years of experience developing, implementing, and testing high performance communications/networking systems.
Strong software development and debugging skills are mandatory.
Verilog RTL design and simulation experience is required.
Significant hands on experience with high speed serial devices (SERDES) is required.
Working knowledge of DSP principals and practices is highly desirable.
Good understanding of Physical layer protocols for one of following: IEEE802.3, PCIE, CEI or FC
Proficiency in the following:
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5+ years C/C++ programming
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Experience simulating microcontroller in Verilog RTL environment
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Perl, python or other scripting languages
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Source code control and bug tracking systems
This opportunity is available to engineers currently living or willing to relocate to one of these locations: Austin, TX