Principal Engineers at Intel are active technical leaders inside and outside the company. Activities include participation in major industry and academic conferences, voting membership in international standards committees, generation of patents and technical papers. Note This job code can only be assigned if an employee has participated in an official Technical Leadership Program (TLp) nomination process for his/her business group. An employee’s manager must confirm participation in TLp nomination process prior to job code assignment.- Responsible for the technical correctness of SW for Movidius – quality, reliability, and KPI- Drive the SW architecture vision to implementation in the code support of the roadmap- Partner with CCG and IOT to develop coherent and effiicint intefaces beuween IP and stacks for multiple use models.- Coaching and mentoring junior staff and developing TLP pipeline- Some International will be required
Qualifications
- Engineering background to minimum of degree level (MSc or above preferred)
- Experience working with deep learning or computer vision products preferred but essential
- 10+ years broad business and technical understanding of markets & applications, SOC architectures and technologies
- 7+ years industry experience in a semiconductor or related role
- 7+ years’ experience in Strategic Planning, Architecture definition, Design Engineering and or Application Engineering
- 10+ years of edge applications, technical marketing, planning, or equivalent ASIC/ASSP experience
- Industry knowledge of Edge devices and accelerators
In addition to the normal onerous qualification of SPE this role requires
- Embedded software development experience in the context of HW/SW co-design to support software shift left
- Expertise with RTOS and embedded Linux
- A proven track record of influencing standard in the industry eco-system
- A background in high availability or safety-critical systems is highly desirable
- This role requires an individual able to work from abstract architectural concepts to the hands-on debug of assembly language code and RTL