You will be a part of a small team responsible for solving various design challenges in the development of several families of state-of-the-art IoT microcontroller devices that cater to a growing range of IoT applications. This is an opportunity to join a top-notch MCU architecture and Design Team with Renesas Electronics America’s leading MCU product development organizations. As part of one of Renesas’s most prominent MCU development Groups, this Engineer will work on next-generation MCU products for multiple fast paced product lines.
What we need:
Renesas IoT Embedded System Architecture team is seeking highly motivated, energetic digital designer and microarchitect, to help develop next generation IoT Embedded technologies. In this role, you will contribute to developing Renesas state-of-the-art IoT microcontroller devices. As an IoT microcontroller design engineer, you will be a part of a small team responsible for solving various architectural and design challenges in the development of several families of state-of-the-art IoT microcontroller devices that cater to a growing range of IoT applications.
What You’ll do
- Contribute to design and development of next generation IoT Embedded devices
- Select, evaluate, and recommend internal and third-party IPs
- Create design specifications
- Integrate internal and 3rd party IP
- Execute ASIC/FPGA design flows
- Understand Performance, power, area tradeoffs
Skills You’ll Need
- MS/PhD in Computer or Electrical Engineering
- Experience with one of the following areas
- Embedded system hardware security architecture, including Root of trust, secure boot, secure debug, secure test, secure update, and implementation of secure embedded life cycles
- Microprocessor subsystem architecture, on chip interconnect, and advanced debug and trace
- Embedded power management architectures, advanced low power techniques, SoC clocking and reset
- ASIC/FPGA design flow (RTL coding, testbench development, verification, and implementation)
- Understanding of modern SoC architectures and PPA (Performance, Power, and Area) tradeoffs, digital design, and ASIC/SoC micro-architecture
- Chip design experience including modern CAD tools.